From 3096ffe95508d0314a00bb5e7511a1d23f343939 Mon Sep 17 00:00:00 2001 From: Shaun Ruffell Date: Thu, 15 May 2014 13:27:28 -0500 Subject: [PATCH] wctc4xxp: Disable read-line and read-line-multiple PCI commands. The read-line-multiple command was already disabled on the voicebus cards, which use the same interface, in commit 4de462c3e014c612b2aa5bbf7f056c747eb01687. This does the same thing for the transcoder card and also disables the read line command. I've seen this change directly correlated to problems with the AN983 receiving packets from the onboard DSP on some platforms. Internal-Issue-ID: DAHDI-1071 Signed-off-by: Shaun Ruffell Signed-off-by: Russ Meyerriecks --- drivers/dahdi/wctc4xxp/base.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/drivers/dahdi/wctc4xxp/base.c b/drivers/dahdi/wctc4xxp/base.c index 83a2674..6d76976 100644 --- a/drivers/dahdi/wctc4xxp/base.c +++ b/drivers/dahdi/wctc4xxp/base.c @@ -2641,31 +2641,42 @@ static int wctc4xxp_hardware_init(struct wcdte *wc) { /* Hardware stuff */ + enum { + /* Software Reset */ + SWR = (1 << 0), + /* Bus Arbitration (1 for priority transmit) */ + BAR = (1 << 1), + /* Memory Write Invalidate */ + MWI = (1 << 24), + /* Memory Read Line */ + MRL = (1 << 23), + /* Descriptor Skip Length */ + DSLShift = 2, + /* Cache Alignment */ + CALShift = 14, + /* Transmit Auto Pollling */ + TAPShift = 17, + }; u32 reg; unsigned long newjiffies; u8 cache_line_size; - const u32 DEFAULT_PCI_ACCESS = 0xfff80000; - - /* Enable I/O Access */ - pci_read_config_dword(wc->pdev, 0x0004, ®); - reg |= 0x00000007; - pci_write_config_dword(wc->pdev, 0x0004, reg); + const u32 DEFAULT_PCI_ACCESS = (MWI | (11 << TAPShift)); if (pci_read_config_byte(wc->pdev, 0x0c, &cache_line_size)) return -EIO; switch (cache_line_size) { case 0x08: - reg = DEFAULT_PCI_ACCESS | (0x1 << 14); + reg = DEFAULT_PCI_ACCESS | (0x1 << CALShift); break; case 0x10: - reg = DEFAULT_PCI_ACCESS | (0x2 << 14); + reg = DEFAULT_PCI_ACCESS | (0x2 << CALShift); break; case 0x20: - reg = DEFAULT_PCI_ACCESS | (0x3 << 14); + reg = DEFAULT_PCI_ACCESS | (0x3 << CALShift); break; default: - reg = 0xfe584202; + reg = (11 << TAPShift); break; }