From dd3c4ba015ae0ab32b2fb28d62af5ec7e4636cd3 Mon Sep 17 00:00:00 2001 From: Russ Meyerriecks Date: Tue, 4 Aug 2015 16:37:22 -0500 Subject: [PATCH] wcb4xxp: Protect indirect register writes with sequence lock A few of the indirect register writes to the A_ST_* indirect registers weren't being protected by any kind of sequence lock. This could lead to potential race conditions of two spans were configured simultaneously. Signed-off-by: Russ Meyerriecks --- drivers/dahdi/wcb4xxp/base.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/dahdi/wcb4xxp/base.c b/drivers/dahdi/wcb4xxp/base.c index 7c55514..c82856c 100644 --- a/drivers/dahdi/wcb4xxp/base.c +++ b/drivers/dahdi/wcb4xxp/base.c @@ -1783,16 +1783,19 @@ static void hfc_reset_st(struct b4xxp_span *s) else b = 0x0c | (6 << V_ST_SMPL_SHIFT); - b4xxp_setreg8(b4, A_ST_CLK_DLY, b); + b4xxp_setreg_ra(b4, R_ST_SEL, s->phy_port, A_ST_CLK_DLY, b); /* set TE/NT mode, enable B and D channels. */ - b4xxp_setreg8(b4, A_ST_CTRL0, V_B1_EN | V_B2_EN | (s->te_mode ? 0 : V_ST_MD)); - b4xxp_setreg8(b4, A_ST_CTRL1, V_G2_G3_EN | V_E_IGNO); - b4xxp_setreg8(b4, A_ST_CTRL2, V_B1_RX_EN | V_B2_RX_EN); + b4xxp_setreg_ra(b4, R_ST_SEL, s->phy_port, A_ST_CTRL0, + V_B1_EN | V_B2_EN | (s->te_mode ? 0 : V_ST_MD)); + b4xxp_setreg_ra(b4, R_ST_SEL, s->phy_port, A_ST_CTRL1, + V_G2_G3_EN | V_E_IGNO); + b4xxp_setreg_ra(b4, R_ST_SEL, s->phy_port, A_ST_CTRL2, + V_B1_RX_EN | V_B2_RX_EN); /* enable the state machine. */ - b4xxp_setreg8(b4, A_ST_WR_STA, 0x00); + b4xxp_setreg_ra(b4, R_ST_SEL, s->phy_port, A_ST_WR_STA, 0x00); flush_pci(); udelay(100);