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Fix endianness tests, allowing arm64 support

Browse Source 
https://buildd.debian.org/status/logs.php?pkg=simgear&ver=3.2.0~git20140719%2B4a9125-1&suite=experimental
https://launchpadlibrarian.net/183053167/buildlog_ubuntu-utopic-arm64.simgear_3.0.0-4_FAILEDTOBUILD.txt.gz
This commit is contained in:
Rebecca N. Palmer
2015-01-18 21:53:22 +00:00
parent dc1816bb08
commit 27a91062bd
3 changed files with 26 additions and 16 deletions
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6
simgear/nasal/cppbind/test/nasal_num_test.cxx
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@@ -39,6 +39,12 @@ static void runNumTests( double (TestContext::*test_double)(const std::string&),
BOOST_CHECK_EQUAL((c.*test_int)("0x755"), 0x755);
BOOST_CHECK_EQUAL((c.*test_int)("0x055"), 0x55);
BOOST_CHECK_EQUAL((c.*test_int)("-0x155"), -0x155);
BOOST_CHECK_CLOSE((c.*test_double)("2.000000953656983160"),
2.000000953656983160, 1e-5);
/* this value has bit pattern 0x400000007fff6789L,
* so will look like a pointer if the endianness is set wrong
* (see naref.h, data.h)*/
}
BOOST_AUTO_TEST_CASE( parse_num )

31
simgear/nasal/naref.h
View File

@@ -1,28 +1,31 @@
#ifndef _NAREF_H
#define _NAREF_H
/* Rather than play elaborate and complicated games with
* platform-dependent endianness headers, just detect the platforms we
* support. This list is simpler and smaller, yet still quite
* complete. */
#if (defined(__x86_64) && defined(__linux__)) || defined(__sparcv9) || \
defined(__powerpc64__)
/* Win64 and Irix should work with this too, but have not been
* tested */
/* NASAL_NAN64 mode requires 64 bit pointers that only use the
* lower 48 bits; Win64 and Irix should work with this too, but
* have not been tested */
# define NASAL_NAN64
#elif defined(__BYTE_ORDER__)
/* GCC and Clang define these (as a builtin, while
* __LITTLE_ENDIAN__ requires a header), MSVC doesn't */
# if __BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__
# define NASAL_LE
# elif __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
# define NASAL_BE
# else
# error Unrecognized endianness
# endif
#elif defined(_M_IX86) || defined(i386) || defined(__x86_64) || \
defined(__ia64__) || defined(_M_IA64) || defined(__ARMEL__) || \
defined(_M_X64) || defined(__alpha__) || \
(defined(__sh__) && defined(__LITTLE_ENDIAN__))
defined(_M_X64) || defined(_M_ARM)
# define NASAL_LE
#elif defined(__sparc) || defined(__ppc__) || defined(__PPC) || \
defined (__powerpc__) || defined (__powerpc64__) || defined (__alpha__) || \
defined(__mips) || defined(__ARMEB__) || \
defined(__hppa__) || defined(__s390__) || defined(__s390x__) || \
(defined(__sh__) && !defined(__LITTLE_ENDIAN__))
#elif defined(__sparc) || defined(__ARMEB__) || \
defined(__hppa__) || defined(__s390__) || defined(__s390x__)
# define NASAL_BE
#else
# error Unrecognized CPU architecture
# error Unknown endianness
#endif
typedef union {

5
simgear/package/md5.c
View File

@@ -158,7 +158,8 @@ SG_MD5Transform(u_int32_t state[4], const u_int8_t block[MD5_BLOCK_LENGTH])
{
u_int32_t a, b, c, d, in[MD5_BLOCK_LENGTH / 4];
#ifndef WORDS_BIGENDIAN
#if ((defined(__BYTE_ORDER__) && __BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__) || \
defined(_M_IX86) || defined(_M_X64) || defined(_M_ARM) )
memcpy(in, block, sizeof(in));
#else
for (a = 0; a < MD5_BLOCK_LENGTH / 4; a++) {
@@ -247,4 +248,4 @@ SG_MD5Transform(u_int32_t state[4], const u_int8_t block[MD5_BLOCK_LENGTH])
state[1] += b;
state[2] += c;
state[3] += d;
}
}